Bitfury is hiring a Web3 RTL Verification Engineer
Compensation: $54k - $90k estimated
Location: Leuven, Flemish Brabant, Belgium
We are searching for an RTL Verification Engineer to join our AI chip design team.
Duties and responsibilities:
- Guarantee RTL designs are matching specifications and requirements.
- Define and implement verification plans and test plans to ensure the designs meet quality and performance goals.
- Build and maintain automated verification environments.
- Collaborate and communicate with management regarding verification status, project progress, and issue resolution.
- Provide customer level 3 technical support for the implemented design.
- Provide proper and comprehensive documentation for the usage and the architecture of the verification environments as well as reports for the verification results.
- Contribute to technical directions on all aspects of the verification domain.
Qualification:
- 3+ years of experience in ASIC or FPGA design or verification
- Verilog, System Verilog
- Verification EDA tools, Verification methodologies, Verification IPs
- Data management and version control systems
- Automation servers and continuous integration
- Proficiency in programming and/or scripting languages (Python, Cshell…)
- Background in digital circuitry or hardware logic design
Apply Now:
This job is closed
Compensation: $54k - $90k estimated
Location: Leuven, Flemish Brabant, Belgium
This job is closed
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