Design Web3 Jobs in United States

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Job Position Company Posted Location Salary Tags

Bitfury

San Jose, CA, United States

$72k - $75k

Bitfury

San Francisco, CA, United States

$72k - $75k

Blockstream

San Francisco, CA, United States

$58k - $80k

Okcoin

San Francisco, CA, United States

$45k - $75k

Tron

San Francisco, CA, United States

$45k - $75k

NEAR

San Francisco, CA, United States

$45k - $75k

Gemini

New York, NY, United States

$67k - $95k

Gemini

New York, NY, United States

$45k - $75k

Gemini

New York, NY, United States

$45k - $75k

Gemini

New York, NY, United States

$36k - $95k

Voice

New York, NY, United States

$67k - $95k

Voice

New York, NY, United States

$45k - $65k

Voice

New York, NY, United States

$58k - $75k

Valora Inc

San Francisco, CA, United States

$54k - $60k

SuperRare Labs

New York, NY, United States

$67k - $95k

Physical Design Engineer IC Backend

Bitfury
$72k - $75k estimated

This job is closed

We are currently searching for a Physical Design Engineer to join our ASIC development team.

Duties and responsibilities:
  • Digital Backend/Mixed Signal Design Flow setup and maintenance.
  • Backend Implementation (RTL to GDS).
  • Library Characterization.
  • SPICE simulations.

Qualifications:

  • 12+ years experience in driving Tape-out of complex SOC/ASICs.
  • Experience in implementing low-power designs on advanced foundry nodes (TSMC/Samsung/GF/Intel).
  • Hands-on experience in RTL to GDS flows or methodologies.
  • Experience in multiple EDA tools relevant to place and route, STA, Physical verification, Power grid verification, synthesis, DFT, and LP checks.
  • Experience with CMOS digital logic function, timing, and power.
  • Experience with circuit design flows.

Preferred Qualifications:

  • Experience leading one or more aspects of physical design or physical design flow/methodology to successful tapeouts and shipping silicon.
  • Experience in extraction of design parameters, QoR metrics, and analysing trends and knowledge of semiconductor device physics and transistor characteristics.
  • Experience in IP design and integration.
  • Knowledge of semiconductor device physics, transistor characteristics and multiple foundry.